PCIE FMC CARRIER KINTEX-7
重点方案领域直达:
⚡
嵌入式复杂逻辑器件(FPGA,CPLD)评估板 芯片选型指南与应用电路参考
本专区收录了 726 款主流 嵌入式复杂逻辑器件(FPGA,CPLD)评估板 电子元器件。涵盖详细工作电压/电流、封装尺寸、引脚分布图(Pinout)、工作温度范围等电气参数,支持按原厂型号精准比对、Pin-to-Pin 替代选型及最新原厂官方 Datasheet 规格书免费查阅与下载。
| 器件型号 (MPN) | 制造原厂 | 封装规格 | 电气特性与技术摘要 | 规格书 / 详情 |
|---|---|---|---|---|
| Trenz Electronic GmbH |
标准封装
|
PCIE FMC CARRIER KINTEX-7 | ||
| Trenz Electronic GmbH |
标准封装
|
PCIE FMC CARRIER KINTEX-7 | ||
|
EK-VMK180-G-ED
PDF
|
AMD |
标准封装
|
EVAL VMK180 VERSAL PRIME ED | |
|
TEC0810-03
PDF
|
Trenz Electronic GmbH |
标准封装
|
COMPACTPCI SERIAL CARD | |
|
TE0706-03
PDF
|
Trenz Electronic GmbH |
标准封装
|
TE0706 - CARRIERBOARD FOR TRENZ | |
| Altera |
标准封装
|
DEV KIT ARRIA 10 FPGA | ||
|
DK-DEV-5CSXC6N-B
PDF
|
Altera |
标准封装
|
CYCLONE V SOC DEVELOPMENT KIT | |
| iWave Global |
标准封装
|
STRATIX 10 (-2) SX850 SOC DEVKIT | ||
|
TE0603-03
PDF
|
Trenz Electronic GmbH |
标准封装
|
CARRIER BOARD FOR TE0600 | |
|
FPGA010A-FT
PDF
|
Numato Lab |
标准封装
|
Skoll: AMD K7 FPGA Dev Kit - FT | |
| iWave Global |
标准封装
|
ARRIA 10 SX660 (-1 SPEED) DEVKIT | ||
|
SLG46535V-DIP
PDF
|
Renesas Electronics Corporation |
标准封装
|
20-PIN DIP PROTO BOARD SLG46535 | |
|
SLG46538V-DIP
PDF
|
Renesas Electronics Corporation |
标准封装
|
20-PIN DIP PROTO BOARD SLG46538 | |
|
P0493
PDF
|
Terasic Inc. |
标准封装
|
DE10-STANDARD DEV KIT | |
|
410-351-20
PDF
|
Digilent, Inc. |
标准封装
|
ZYBO Z7-20: ZYNQ-7000 ARM/FPGA S | |
|
24511
PDF
|
SparkFun Electronics |
标准封装
|
SIPEED TANG PRIMER 25K | |
|
M1A3PL-DEV-KIT
PDF
|
Microchip Technology |
标准封装
|
KIT DEV ARM CORTEX-M1 PROASIC3L | |
| Microchip Technology |
标准封装
|
HELLO FPGA DEVELOPMENT KIT | ||
|
A2F-EVAL-KIT-2
PDF
|
Microchip Technology |
标准封装
|
KIT EVAL SMARTFUSION A2F | |
|
LIFCL-33U-EVN
PDF
|
Lattice Semiconductor Corporation |
标准封装
|
CROSSLINKU-NX EVALUATION BOARD | |
| Lattice Semiconductor Corporation |
标准封装
|
DEV KIT FOR ECP5 VERSA | ||
|
410-398
PDF
|
Digilent, Inc. |
标准封装
|
USB104 A7: ARTIX-7 FPGA DEVELOPM | |
|
M2GL-EVAL-KIT
PDF
|
Microchip Technology |
标准封装
|
KIT EVAL FOR IGLOO 2 | |
|
P0581
PDF
|
Terasic Inc. |
标准封装
|
TERASIC SOC SYSTEM ON MODULE EVA | |
|
EPT-5M57-AP-M5
PDF
|
Earth People Technology |
标准封装
|
MAX V CPLD 32 USER GPIO MEGAMAX | |
|
IZD0004
PDF
|
Red Pitaya d.d. |
标准封装
|
STEMLAB 125-14 CALIBRATED KIT | |
| Enclustra FPGA Solutions |
标准封装
|
CARRIER MERCURY PCIE X4 2XFMC | ||
|
IZD0031
PDF
|
Red Pitaya d.d. |
标准封装
|
STEMLAB 125-14 EXT CLOCK STARTER | |
|
LCMXO3L-SMA-EVN
PDF
|
Lattice Semiconductor Corporation |
标准封装
|
BOARD EVAL FOR MACHXO3L | |
|
P0638
PDF
|
Terasic Inc. |
标准封装
|
MAX 10 PLUS EVALBOARD |